(1). Field of the Invention
The invention relates to the use of trenches with walls formed in a semiconductor substrate. The trenches are then filled with highly doped polysilicon or a layer of highly doped polysilicon is formed on the trench walls to form the source and drain of a field effect transistor in an integrated circuit.
(2). Description of the Prior Art
In using field effect transistors in the formation of integrated circuits keeping source and drain resistances low has long been recognized as important. In addition it is important to keep the capacitance between the gate and source and between the source and drain as low as possible. These considerations become more important still as levels of integration increase and as circuit speeds increase.
This invention uses trenches in the semiconductor substrate to form source and drain areas which minimize source and drain resistance. The capacitance between gate and source and gate and drain are also minimized. U.S. Pat. No. 5,204,280 to Dhong et al shows a method for lithography for making trenches but for a different purpose than for this invention.